In big cities like New York, you have to make buildings taller in order to get more people into smaller spaces. Now computer chip makers are trying the same thing.
A team from Purdue and Harvard universities, led by doctoral students Jiangjiang Gu (Purdue) and Yiqun Liu (Harvard), has created a new type of transistor with a 3-D structure. Instead of the conventional, flat silicon architecture that has defined computer chips for decades, the scientists made connections from a three-dimensional arrangement of indium-gallium arsenide (InGaAs).
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Building computer chips in three dimensions instead of two has been proposed before. In conventional transistors, features such as the source, gate (which regulates the flow of electric current) and drain are laid down on top of each other in layers. Shrinking the size of the gate is one goal for chip manufacturers, but electrons are not as mobile in silicon gates as in those made from other materials.
But the new 3D structure reaches this goal. The gate is just 22 nanometers in size compared to 45 nanometers in silicon chips. The theoretical limit for silicon is 14 nanometers, whereas gates made from indium-gallium arsenide can get down to 10 nanometers.
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Piede “Peter” Ye, a professor of electrical and computer engineering at Purdue and co-author of the research, noted in a statement that using the new materials and achieving smaller gate lengths will give us computers that are faster and use less power.
Another plus for this technology is that it was manufactured via atomic layer deposition, a method that is common to the computer chip industry now, which means companies that make the chips need not retool entire factories. This structure will be in a number of chips released by companies such as Intel in 2012.
Photo: Anthony Harvie/Getty Images
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